1. Field of the Invention
The present invention relates to a structure of a MOSFET (metal oxide semiconductor field effect transistor) and a manufacturing method thereof, and more particularly to a MOSFET having a LDD (lightly doped drain) structure which is capable of decreasing hot carrier and doping compensation effects.
2. Description of the Prior Art
Generally, a MOSFET is a semiconductor element which is made of substantially three portions: a gate; a source region; and a drain region. A MOSFET utilizes the effect that, when a predetermined voltage is applied to the gate, a channel is produced between the source region and the drain region, and thereby electrons may be moved along the channel from the source region to the drain region (in the case of an n-channel type MOSFET).
The structure and manufacturing method and operation of the above-described conventional MOSFET will be described with reference to the FIGS. 1(a) to 2(b) as follows.
FIG. 1(a) illustrates gate 2 formed on p-type substrate 1. Gate oxide film 3 is interposed between gate 2 and substrate 1, and high density n-type source region 4 and high density n-type drain region 4a are formed in substrate 1 below the outside edge portions r1 of gate 2 as shown in FIG. 1(a).
In accordance with the operation of a thus constructed MOSFET, when a predetermined driving voltage is applied to gate 2, electrons are attracted to the surface of substrate 1 by the positive potential of gate 2, and a predetermined thickness of channel is formed between source region 4 and drain region 4a as illustrated in FIG. 1(a), and thereby electron flow may occur along this channel from source region 4 to drain region 4a.
However, in a MOSFET of the structure of FIG. 1(a), carrier concentration is abruptly decreased as illustrated in FIG. 1(b) (generally indicated by the dotted line in FIG. 1(b)) at the edge portion r1 of gate 2 (where gate 2 and drain region 4a adjoin each other) when a driving voltage is applied to gate 2, and an abrupt high electric field is formed (generally indicated by the solid line in FIG. 1(b)).
Accordingly, hot electrons may be generated at the portion of gate 2 adjoining drain region 4a, and these hot electrons may be trapped by thin gate oxide film 3. Since trapped hot electrons may recombine with positive holes collected at interface between gate oxide film 3 and gate 2, variations in the threshold voltage of the MOSFET or other undesirable effects may occur. This phenomenon is referred to as the hot carrier effect. Since the reliability of the MOSFET may be decreased due to the hot carrier effect, research is being conducted into ways for preventing its occurrence. Although increasing the length of the gate is included among the suggested approaches, increased gate length is somewhat contradictory in that it means retrogressing against the trend for high integration. Therefore, an LDD (lightly doped drain) structure as shown in FIG. 2(c) has been proposed as a method for decreasing the hot carrier effect. An LDD structure is a structure for decreasing the electric field, which exerts a great influence on the hot carrier effect near the drain region.
FIGS. 2(a), (b) and (c) illustrate cross sectional views of a manufacturing process of a MOSFET having a conventional LDD structure. As shown in FIG. 2(a), gate oxide film 6 is grown on p-type silicon substrate 5. A p-type ion implantation is performed including in what is to be the channel region in order to suppress the threshold voltage of punch through, which can occur with a short channel.
As illustrated in FIG. 2(b), polysilicon is formed on gate oxide film 6, and gate 7 is formed by patterning the polysilicon. Thereafter, low density n-type source region 9 and low density n-type drain region 10 for an LDD structure are formed by a low density n-type ion implantation using gate 7 as a mask.
As shown in FIG. 2(c), a CVD (chemical vapour deposition) oxide film is deposited and etched back, forming side wall oxide films 8 and 8a at side walls of gate 7. Thereafter, high density n-type source region 9a and high density n-type drain region 10a are formed by a high density n-type ion implantation, and thereby a MOSFET of an LDD structure is completed.
The MOSFET of such a conventional LDD structure operates as a MOSFET generally similar to that discussed in connection with FIG. 1. However, since low density n-type drain region 10 is formed between gate 7 (and the channel region below) and high density n-type drain 10a, the hot carrier effect could be decreased in that the hot carrier effect increases as the electric field increases, and the electric field is decreased in the structure shown in FIG. 2.
In other words, the lower the density of the n-type drain region against the p-type channel region, a wider depletion region is formed. On the other hand, the higher the density of the p-type channel against the n-type drain region, a narrower depletion region is formed. In the structure shown in FIG. 2, since the density of n-type drain region 10 is low, the depletion region is more widely formed, and the electric field is decreased.
However, in a MOSFET having a LDD structure as shown in FIG. 2, in order to prevent short channel effects due to the desire for high integration, a p-type ion implantation is performed in the channel region. As a result thereof, the density of the p-type channel region against the n-type drain region is higher than the density of the substrate. The increased p-type density in the channel region tends to increase the electric field, and simultaneously the hot carrier effect is increased. In addition, in order to form n-type source/drain regions adjacent to the p-type channel region, the density of n-type source/drain regions should be higher than that of the p-type channel region. However, as high integration is made, and a p-type ion implantation is performed in order to prevent the short channel effect thereby increasing the channel density, the relative difference in densities between the n-type source/drain regions against the p-type channel becomes less. As a result, a problem occurs in that a doping compensation effect arises, and the doping of the n-type source/drain regions can become unstable.